module BCDToReverser(
	input load_flag,
	input [15:0]ResetVal,
	input [15:0]LoadVal,
	input ModeSel,
	input clk,
	input rst_n,
	input StartStop,

	output [7:0]LSB_Reverser_output,
	output [7:0]MSB_Reverser_output
);

wire clk_100Hz;
wire clk_1Hz;
wire [7:0] LSB_binary;
wire [7:0] MSB_binary;
wire [7:0] LSB_BCD_output;
wire [7:0] MSB_BCD_output;
wire selected_clk;



ClockDivider CB(
	.CLK_50MHz(clk),
	.rst_n(rst_n),
	.CLK_100Hz(clk_100Hz),
	.CLK_1Hz(clk_1Hz)
);

assign selected_clk = (ModeSel == 0) ? clk_100Hz : clk_1Hz;

TimerCoreLogic TC(
	.load_flag(load_flag),
	.ResetVal(ResetVal),
	.LoadVal(LoadVal),
	.ModeSel(ModeSel),
	.clk(selected_clk), 
	.rst_n(rst_n),
	.StartStop(StartStop),
	.LSBbinaryout(LSB_binary),
	.MSBbinaryout(MSB_binary)
);

BinaryToBCD BB_LSB(
	.Binary_in(LSB_binary),
	.Bcd_Out(LSB_BCD_output)
);

BinaryToBCD BB_MSB(
	.Binary_in(MSB_binary),
	.Bcd_Out(MSB_BCD_output)
);

Reverser RV_LSB(
	.RevIn(LSB_BCD_output),
	.ModeSel(ModeSel),
	.RevOut(LSB_Reverser_output)
);

Reverser RV_MSB(
	.RevIn(MSB_BCD_output),
	.ModeSel(ModeSel),
	.RevOut(MSB_Reverser_output)
);

endmodule